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VERIFICATION METHODOLOGY MANUAL FOR LOW POWER By Srikanth Jadcherla & Janick

Description: This manual is a valuable resource for anyone interested in the verification methodology of low-power electronics. It provides a comprehensive guide to the subject matter and covers various aspects such as publication year, type, format, language, publication name, author, ISBN-10, and publisher. The book title is "Verification Methodology Manual for Low Power" and it has 226 pages. The manual is in English and published by Synopsys in 2009. It is a paperback format and the ISBN-10 is 160743413X. The book is authored by Yoshio Inoue, David Flynn, Janick Bergeron, and Srikanth Jadcherla. This manual is categorized under "Books & Magazines", "Textbooks, Education & Reference", and "Textbooks".

Price: 9.99 USD

Location: San Jose, California

End Time: 2024-11-22T02:30:53.000Z

Shipping Cost: 5.38 USD

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VERIFICATION METHODOLOGY MANUAL FOR LOW POWER By Srikanth Jadcherla & Janick

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Publication Year: 2009

Type: Paperback

Format: Unknown

Language: English

Book Title: Verification Methodology Manual for Low Power

Publication Name: Synopsys

ISBN-10: 160743413X

Author: Srikanth Jadcherla, Janick Bergeron, Yoshio Inoue, David Flynn

Publisher: Synopsys

Number of Pages: 226

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