Description: Reconfigurable Networks-on-Chip by Sao-Jie Chen, Ying-Cherng Lan, Wen-Chung Tsai, Yu-Hen Hu Includes tutorial-like details to introduce readers to a diverse range of NoC designs, as well as in-depth analysis for designers with NoC experience to explore advanced issues; FORMAT Hardcover LANGUAGE English CONDITION Brand New Publisher Description This book provides a comprehensive survey of recent progress in the design and implementation of Networks-on-Chip. It addresses a wide spectrum of on-chip communication problems, ranging from physical, network, to application layers. Specific topics that are explored in detail include packet routing, resource arbitration, error control/correction, application mapping, and communication scheduling. Additionally, a novel bi-directional communication channel NoC (BiNoC) architecture is described, with detailed explanation. Written for practicing engineers in need of practical knowledge about the design and implementation of networks-on-chip; Includes tutorial-like details to introduce readers to a diverse range of NoC designs, as well as in-depth analysis for designers with NoC experience to explore advanced issues; Describes a variety of on-chip communication architectures, including a novel bi-directional communication channel NoC. From the Foreword:Overall this book shows important advances over the state of the art that will affect future system design as well as R&D in tools and methods for NoC design. It represents an important reference point for both designers and electronic design automation researchers and developers.--Giovanni De Micheli Notes Written for practicing engineers in need of practical knowledge about the design and implementation of networks-on-chipIncludes tutorial-like details to introduce readers to a diverse range of NoC designs, as well as in-depth analysis for designers with NoC experience to explore advanced issuesDescribes a variety of on-chip communication architectures, including a novel bi-directional communication channel NoC Back Cover This book provides a comprehensive survey of recent progress in the design and implementation of Networks-on-Chip. It addresses a wide spectrum of on-chip communication problems, ranging from physical, network, to application layers. Specific topics that are explored in detail include packet routing, resource arbitration, error control/correction, application mapping, and communication scheduling. Additionally, a novel bi-directional communication channel NoC (BiNoC) architecture is described, with detailed explanation. Written for practicing engineers in need of practical knowledge about the design and implementation of networks-on-chip; Includes tutorial-like details to introduce readers to a diverse range of NoC designs, as well as in-depth analysis for designers with NoC experience to explore advanced issues; Describes a variety of on-chip communication architectures, including a novel bi-directional communication channel NoC. From the Foreword: Overall this book shows important advances over the state of the art that will affect future system design as well as R&D in tools and methods for NoC design. It represents an important reference point for both designers and electronic design automation researchers and developers. --Giovanni De Micheli Table of Contents Communication Centric Design.- Preliminaries.- Techniques for High Performance NoC Routing.- Performance-Energy tradeoffs for NoC Reliability.- Energy-aware Task Scheduling for NoC-based DVS System.- Bi-directional NoC Architecture.- Quality-of-Service in BiNoC.- Fault Tolerance in BiNoC.- Application Mapping for BiNoC. Review From the reviews:"This monograph reviews the fundamental theories, architectures, algorithms, and state-of-the-art development of NoC. The book begins with an overview of the communication-centric design for multi-processor system-on-chip (MP-SoC) and conventional NoC architectures, followed by an extended introduction to the design methodology of NoC. The book concludes with a case study of bidirectional NoC (BiNoC) architecture. … Overall, this monograph provides an in-depth, academic introduction to the design methodology of NoC architecture. … It is suitable for academic researchers and professionals working with NoC." (Jun Liu, ACM Computing Reviews, July, 2012) Review Quote From the reviews:This monograph reviews the fundamental theories, architectures, algorithms, and state-of-the-art development of NoC. The book begins with an overview of the communication-centric design for multi-processor system-on-chip (MP-SoC) and conventional NoC architectures, followed by an extended introduction to the design methodology of NoC. The book concludes with a case study of bidirectional NoC (BiNoC) architecture. … Overall, this monograph provides an in-depth, academic introduction to the design methodology of NoC architecture. … It is suitable for academic researchers and professionals working with NoC. (Jun Liu, ACM Computing Reviews, July, 2012) Feature Written for practicing engineers in need of practical knowledge about the design and implementation of networks-on-chip Includes tutorial-like details to introduce readers to a diverse range of NoC designs, as well as in-depth analysis for designers with NoC experience to explore advanced issues Describes a variety of on-chip communication architectures, including a novel bi-directional communication channel NoC Details ISBN1441993401 Author Yu-Hen Hu Publisher Springer-Verlag New York Inc. ISBN-10 1441993401 ISBN-13 9781441993403 Format Hardcover Imprint Springer-Verlag New York Inc. Place of Publication New York, NY Country of Publication United States Edition 2012th DEWEY 004.22 Year 2011 Short Title RECONFIGURABLE NETWORKS-ON-CHI Edition Description 2012 Language English Media Book Publication Date 2011-12-15 Pages 206 DOI 10.1007/978-1-4419-9341-0 AU Release Date 2011-12-15 NZ Release Date 2011-12-15 US Release Date 2011-12-15 UK Release Date 2011-12-15 Alternative 9781489999733 Audience Professional & Vocational Illustrations XIV, 206 p. We've got this At The Nile, if you're looking for it, we've got it. With fast shipping, low prices, friendly service and well over a million items - you're bound to find what you want, at a price you'll love! TheNile_Item_ID:96283559;
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ISBN-13: 9781441993403
Book Title: Reconfigurable Networks-on-Chip
Number of Pages: 206 Pages
Language: English
Publication Name: Reconfigurable Networks-On-Chip
Publisher: Springer-Verlag New York Inc.
Publication Year: 2011
Subject: Computer Science, Physics
Item Height: 235 mm
Item Weight: 500 g
Type: Textbook
Author: Wen-Chung Tsai, Yu-Hen Hu, Ying-Cherng Lan, Sao-Jie Chen
Item Width: 155 mm
Format: Hardcover